ser_avr.c File Reference
AVR UART and SPI I/O driver. More...
#include <drv/ser.h>
#include <drv/ser_p.h>
#include <hw_ser.h>
#include <hw_cpu.h>
#include <appconfig.h>
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <drv/timer.h>
#include <mware/fifobuf.h>
#include <avr/io.h>
#include <avr/signal.h>
Go to the source code of this file.
Data Structures | |
| struct | AvrSerial |
| Internal hardware state structure. More... | |
Defines | |
Hardware handshake (RTS/CTS). | |
| #define | RTS_ON do {} while (0) |
| #define | RTS_OFF do {} while (0) |
| #define | IS_CTS_ON true |
| #define | EIMSKF_CTS 0 |
| Dummy value, must be overridden. | |
Overridable serial bus hooks | |
These can be redefined in hw.h to implement special bus policies such as half-duplex, 485, etc.
TXBEGIN TXCHAR TXEND TXOFF
| __________|__________ | |
| | | | | | | | |
v v v v v v v v v
______ __ __ __ __ __ __ ________________
\/ \/ \/ \/ \/ \/ \/
______/\__/\__/\__/\__/\__/\__/
| |
| #define | SER_UART0_BUS_TXINIT |
| Default TXINIT macro - invoked in uart0_init(). | |
| #define | SER_UART0_BUS_TXBEGIN |
| Invoked before starting a transmission. | |
| #define | SER_UART0_BUS_TXCHAR(c) |
| Invoked to send one character. | |
| #define | SER_UART0_BUS_TXEND |
| Invoked as soon as the txfifo becomes empty. | |
| #define | SER_UART0_BUS_TXOFF |
| Invoked after the last character has been transmitted. | |
| #define | SER_UART1_BUS_TXINIT |
| #define | SER_UART1_BUS_TXBEGIN |
| #define | SER_UART1_BUS_TXCHAR(c) |
| #define | SER_UART1_BUS_TXEND |
| #define | SER_UART1_BUS_TXOFF |
Functions | |
| SIGNAL (USART0_UDRE_vect) | |
| Serial 0 TX interrupt handler. | |
| SIGNAL (SIG_UART0_TRANS) | |
| Serial port 0 TX complete interrupt handler. | |
| SIGNAL (USART0_RX_vect) | |
| Serial 0 RX complete interrupt handler. | |
| SIGNAL (SIG_SPI) | |
| SPI interrupt handler. | |
Detailed Description
AVR UART and SPI I/O driver.Rationale for project_ks hardware.
The serial 0 on the board_kf board is used to communicate with the smart card, which has the TX and RX lines connected together. To allow the smart card to drive the RX line of the CPU the CPU TX has to be in a high impedance state. Whenever a transmission is done and there is nothing more to send the transmitter is turn off. The output pin is held in input with pull-up enabled, to avoid capturing noise from the nearby RX line.
The line on the KBus port must keep sending data, even when there is nothing to transmit, because a burst data transfer generates noise on the audio channels. This is accomplished using the multiprocessor mode of the ATmega64/128 serial.
The receiver keeps the MPCM bit always on. When useful data is trasmitted the address bit is set. The receiver hardware consider the frame as address info and receive it. When useless fill bytes are sent the address bit is cleared and the receiver will ignore them, avoiding useless triggering of RXC interrupt.
- Version:
- Id
- ser_avr.c 941 2007-10-26 13:19:10Z asterix
Definition in file ser_avr.c.
Define Documentation
| #define SER_UART0_BUS_TXBEGIN |
| #define SER_UART0_BUS_TXEND |
| #define SER_UART0_BUS_TXINIT |
| #define SER_UART0_BUS_TXOFF |
| #define SER_UART1_BUS_TXBEGIN |
| #define SER_UART1_BUS_TXCHAR | ( | c | ) |
| #define SER_UART1_BUS_TXEND |
| #define SER_UART1_BUS_TXINIT |
| #define SER_UART1_BUS_TXOFF |
Function Documentation
| SIGNAL | ( | USART0_RX_vect | ) |
Serial 0 RX complete interrupt handler.
This handler is interruptible. Interrupt are reenabled as soon as recv complete interrupt is disabled. Using INTERRUPT() is troublesome when the serial is heavily loaded, because an interrupt could be retriggered when executing the handler prologue before RXCIE is disabled.
- Note:
- The code that re-enables interrupts is commented out because in some nasty cases the interrupt is retriggered. This is probably due to the RXC flag being set before RXCIE is cleared. Unfortunately the RXC flag is read-only and can't be cleared by code.
| SIGNAL | ( | SIG_UART0_TRANS | ) |
Serial port 0 TX complete interrupt handler.
This IRQ is usually disabled. The UDR-empty interrupt enables it when there's no more data to transmit. We need to wait until the last character has been transmitted before switching the 485 transceiver to receive mode.
The txfifo might have been refilled by putchar() while we were waiting for the transmission complete interrupt. In this case, we must restart the UDR empty interrupt, otherwise we'd stop the serial port with some data still pending in the buffer.
Join us on Facebook —
Follow us on Twitter
