at91_rstc.h File Reference


Defines

#define	RSTC_CR (((reg32_t )(RSTC_BASE + 0x00)))
	Reset Controller Control Register.
#define	RSTC_PROCRST 0
	Processor reset.
#define	RSTC_PERRST 2
	Peripheral reset.
#define	RSTC_EXTRST 3
	External reset.
#define	RSTC_KEY 0xA5000000
	Password.

#define	RSTC_SR (((reg32_t )(RSTC_BASE + 0x04)))
	Reset Controller Status Register.
#define	RSTC_URSTS 0
	User reset status.
#define	RSTC_BODSTS 1
	Brownout detection status.
#define	RSTC_RSTTYP_MASK 0x00000700
	Reset type.
#define	RSTC_RSTTYP_POWERUP 0x00000000
	Power-up reset.
#define	RSTC_RSTTYP_WATCHDOG 0x00000200
	Watchdog reset.
#define	RSTC_RSTTYP_SOFTWARE 0x00000300
	Software reset.
#define	RSTC_RSTTYP_USER 0x00000400
	User reset.
#define	RSTC_RSTTYP_BROWNOUT 0x00000500
	Brownout reset.
#define	RSTC_NRSTL 16
	NRST pin level.
#define	RSTC_SRCMP 17
	Software reset command in progress.

#define	RSTC_MR (((reg32_t )(RSTC_BASE + 0x08)))
	Reset Controller Mode Register.
#define	RSTC_URSTEN 0
	User reset enable.
#define	RSTC_URSTIEN 4
	User reset interrupt enable.
#define	RSTC_ERSTL_MASK 0x00000F00
	External reset length.
#define	RSTC_ERSTL_SHIFT 8
	Least significant bit of external reset length.
#define	RSTC_BODIEN 16
	Brown-out detection interrupt enable.

Detailed Description

AT91 reset controller. This file is based on NUT/OS implementation. See license below.

Definition in file at91_rstc.h.

#define RSTC_CR (*((reg32_t *)(RSTC_BASE + 0x00)))

Reset Controller Control Register.

Reset controller control register address.

Definition at line 78 of file at91_rstc.h.

#define RSTC_MR (*((reg32_t *)(RSTC_BASE + 0x08)))

Reset Controller Mode Register.

Reset controller mode register address.

Definition at line 103 of file at91_rstc.h.

#define RSTC_SR (*((reg32_t *)(RSTC_BASE + 0x04)))

Reset Controller Status Register.

Reset controller status register address.

Definition at line 87 of file at91_rstc.h.