examples/triface/hw/hw_sipo.h

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#ifndef HW_SIPO_H
#define HW_SIPO_H

#include <cfg/macros.h>

#include <avr/io.h>

//Set output pin for sipo
#define SCK_OUT            (DDRB |= BV(PB1))  // Shift register clock input pin
#define SOUT_OUT           (DDRB |= BV(PB2))  // Serial data input pin
#define SLOAD_OUT          (DDRB |= BV(PB3))  // Storage register clock input pin
#define OE_OUT             (DDRG |= BV(PG3))  // Output enable pin

//Define output level
#define SCK_HIGH           (PORTB |= BV(PB1))
#define SCK_LOW            (PORTB &= ~BV(PB1))
#define SOUT_OUT_HIGH      (PORTB |= BV(PB2))
#define SOUT_OUT_LOW       (PORTB &= ~BV(PB2))
#define SLOAD_OUT_HIGH     (PORTB |= BV(PB3))
#define SLOAD_OUT_LOW      (PORTB &= ~BV(PB3))
#define OE_LOW             (PORTG &= BV(PG3))

#define SIPO_SI_HIGH()    SOUT_OUT_HIGH
#define SIPO_SI_LOW()     SOUT_OUT_LOW

#define SIPO_SI_CLOCK() \
    do{ \
        SCK_HIGH; \
        SCK_LOW; \
    }while(0)

#define SIPO_LOAD() \
    do { \
        SLOAD_OUT_HIGH; \
        SLOAD_OUT_LOW; \
    }while(0)

#define SIPO_ENABLE() OE_LOW;


#define SIPO_INIT_PIN() \
    do { \
        OE_OUT; \
        SOUT_OUT; \
        SCK_OUT; \
        SLOAD_OUT; \
        SIPO_ENABLE(); \
    } while(0)


#endif /* HW_SIPO_H */