at91_tc.h

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/*
 * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
 *
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 * modification, are permitted provided that the following conditions
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 *
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 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
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 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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 */

#ifndef AT91_TC_H
#define AT91_TC_H


#define TC_TC0_OFF              0x00000000     
#define TC_TC1_OFF              0x00000040     
#define TC_TC2_OFF              0x00000080     
#define TC0_CCR         (*((reg32_t *)(TC_BASE + TC_TC0_OFF))) 
#define TC1_CCR         (*((reg32_t *)(TC_BASE + TC_TC1_OFF))) 
#define TC2_CCR         (*((reg32_t *)(TC_BASE + TC_TC2_OFF))) 
#define TC_CLKEN                         0      
#define TC_CLKDIS                        1      
#define TC_SWTRG                         2      


#define TC_CMR_OFF              0x00000004      
#define TC0_CMR         (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_CMR_OFF))) 
#define TC1_CMR         (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_CMR_OFF))) 
#define TC2_CMR         (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_CMR_OFF))) 

#define TC_CLKS_MASK            0x00000007      
#define TC_CLKS_MCK2            0x00000000      
#define TC_CLKS_MCK8            0x00000001      
#define TC_CLKS_MCK32           0x00000002      
#define TC_CLKS_MCK128          0x00000003      
#define TC_CLKS_MCK1024         0x00000004      
#define TC_CLKS_XC0             0x00000005      
#define TC_CLKS_XC1             0x00000006      
#define TC_CLKS_XC2             0x00000007      

#define TC_CLKI                          3      

#define TC_BURST_MASK           0x00000030      
#define TC_BURST_NONE           0x00000000      
#define TC_BUSRT_XC0            0x00000010      
#define TC_BURST_XC1            0x00000020      
#define TC_BURST_XC2            0x00000030      



#define TC_WAVE                         15      
//To select capture mode you must set TC_WAVE bit to 0.
//#define TC_CAPT                         15      ///< Selects capture mode.

#define TC_CPCTRG                       14      
#define TC_LDBSTOP                       6      
#define TC_LDBDIS                        7      

#define TC_ETRGEDG_MASK         0x00000300      
#define TC_ETRGEDG_RISING_EDGE  0x00000100      
#define TC_ETRGEDG_FALLING_EDGE 0x00000200      
#define TC_ETRGEDG_BOTH_EDGE    0x00000300      

#define TC_ABETRG_MASK          0x00000400      
#define TC_ABETRG_TIOA                  10      
//To use external trigger TIOB you must set TC_ABETRG_TIOA bit to 0.
//#define TC_ABETRG_TIOB                  10      ///< TIOB used as an external trigger.


#define TC_LDRA_MASK            0x00030000      
#define TC_LDRA_RISING_EDGE     0x00010000      
#define TC_LDRA_FALLING_EDGE    0x00020000      
#define TC_LDRA_BOTH_EDGE       0x00030000      

#define TC_LDRB_MASK            0x000C0000      
#define TC_LDRB_RISING_EDGE     0x00040000      
#define TC_LDRB_FALLING_EDGE    0x00080000      
#define TC_LDRB_BOTH_EDGE       0x000C0000      


#define TC_CPCSTOP                       6      
#define TC_CPCDIS                        7      

#define TC_EEVTEDG_MASK         0x00000300      
#define TC_EEVTEDG_RISING_EDGE  0x00000100      
#define TC_EEVTEDG_FALLING_EDGE 0x00000200      
#define TC_EEVTEDG_BOTH_EDGE    0x00000300      

#define TC_EEVT_MASK            0x00000C00      
#define TC_EEVT_TIOB            0x00000000      
#define TC_EEVT_XC0             0x00000400      
#define TC_EEVT_XC1             0x00000800      
#define TC_EEVT_XC2             0x00000C00      

#define TC_ENETRG                       12      

#define TC_WAVSEL_MASK          0x00006000      
#define TC_WAVSEL_UP            0x00000000      
#define TC_WAVSEL_UP_RC_TRG     0x00004000      
#define TC_WAVSEL_UPDOWN        0x00002000      
#define TC_WAVSEL_UPDOWN_RC_TRG 0x00003000      


#define TC_ACPA_MASK            0x00030000      
#define TC_ACPA_SET_OUTPUT      0x00010000      
#define TC_ACPA_CLEAR_OUTPUT    0x00020000      
#define TC_ACPA_TOGGLE_OUTPUT   0x00030000      

#define TC_ACPC_MASK            0x000C0000      
#define TC_ACPC_SET_OUTPUT      0x00040000      
#define TC_ACPC_CLEAR_OUTPUT    0x00080000      
#define TC_ACPC_TOGGLE_OUTPUT   0x000C0000      

#define TC_AEEVT_MASK           0x00300000      
#define TC_AEEVT_SET_OUTPUT     0x00100000      
#define TC_AEEVT_CLEAR_OUTPUT   0x00200000      
#define TC_AEEVT_TOGGLE_OUTPUT  0x00300000      

#define TC_ASWTRG_MASK          0x00C00000      
#define TC_ASWTRG_SET_OUTPUT    0x00400000      
#define TC_ASWTRG_CLEAR_OUTPUT  0x00800000      
#define TC_ASWTRG_TOGGLE_OUTPUT 0x00C00000      

#define TC_BCPB_MASK            0x03000000      
#define TC_BCPB_SET_OUTPUT      0x01000000      
#define TC_BCPB_CLEAR_OUTPUT    0x02000000      
#define TC_BCPB_TOGGLE_OUTPUT   0x03000000      

#define TC_BCPC_MASK            0x0C000000      
#define TC_BCPC_SET_OUTPUT      0x04000000      
#define TC_BCPC_CLEAR_OUTPUT    0x08000000      
#define TC_BCPC_TOGGLE_OUTPUT   0x0C000000      

#define TC_BEEVT_MASK           0x30000000      
#define TC_BEEVT_SET_OUTPUT     0x10000000      
#define TC_BEEVT_CLEAR_OUTPUT   0x20000000      
#define TC_BEEVT_TOGGLE_OUTPUT  0x30000000      

#define TC_BSWTRG_MASK          0xC0000000      
#define TC_BSWTRG_SET_OUTPUT    0x40000000      
#define TC_BSWTRG_CLEAR_OUTPUT  0x80000000      
#define TC_BSWTRG_TOGGLE_OUTPUT 0xC0000000      


#define TC_CV_OFF               0x00000010      
#define TC0_CV          (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_CV_OFF))) 
#define TC1_CV          (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_CV_OFF))) 
#define TC2_CV          (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_CV_OFF))) 


#define TC_RA_OFF               0x00000014      
#define TC0_RA          (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RA_OFF))) 
#define TC1_RA          (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RA_OFF))) 
#define TC2_RA          (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RA_OFF))) 


#define TC_RB_OFF               0x00000018      
#define TC0_RB           (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RB_OFF))) 
#define TC1_RB           (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RB_OFF))) 
#define TC2_RB           (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RB_OFF))) 


#define TC_RC_OFF               0x0000001C      
#define TC0_RC          (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RC_OFF))) 
#define TC1_RC          (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RC_OFF))) 
#define TC2_RC          (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RC_OFF))) 



#define TC_SR_OFF               0x00000020      
#define TC0_SR          (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_SR_OFF))) 
#define TC1_SR          (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_SR_OFF))) 
#define TC2_SR          (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_SR_OFF))) 

#define TC_IER_OFF              0x00000024      
#define TC0_IER         (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IER_OFF))) 
#define TC1_IER         (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IER_OFF))) 
#define TC2_IER         (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IER_OFF))) 

#define TC_IDR_OFF              0x00000028      
#define TC0_IDR        (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IDR_OFF))) 
#define TC1_IDR        (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IDR_OFF))) 
#define TC2_IDR        (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IDR_OFF))) 

#define TC_IMR_OFF              0x0000002C      
#define TC0_IMR        (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IMR_OFF))) 
#define TC1_IMR        (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IMR_OFF))) 
#define TC2_IMR        (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IMR_OFF))) 

#define TC_COVFS                         0      
#define TC_LOVRS                         1      
#define TC_CPAS                          2      
#define TC_CPBS                          3      
#define TC_CPCS                          4      
#define TC_LDRAS                         5      
#define TC_LDRBS                         6      
#define TC_ETRGS                         7      
#define TC_CLKSTA                       16      
#define TC_MTIOA                        17      
#define TC_MTIOB                        18      


#define TC_BCR_OFF              0x000000C0      
#define TC_BCR         (*((reg32_t *)(TC_BASE + TC_BCR_OFF))) 
#define TC_SYNC                          0      


#define TC_BMR_OFF              0x000000C4      
#define TC_BMR         (*((reg32_t *)(TC_BASE + TC_BMR_OFF))) 
#define TC_TC0XC0S              0x00000003      
#define TC_TCLK0XC0             0x00000000      
#define TC_NONEXC0              0x00000001      
#define TC_TIOA1XC0             0x00000002      
#define TC_TIOA2XC0             0x00000003      

#define TC_TC1XC1S              0x0000000C      
#define TC_TCLK1XC1             0x00000000      
#define TC_NONEXC1              0x00000004      
#define TC_TIOA0XC1             0x00000008      
#define TC_TIOA2XC1             0x0000000C      

#define TC_TC2XC2S              0x00000030      
#define TC_TCLK2XC2             0x00000000      
#define TC_NONEXC2              0x00000010      
#define TC_TIOA0XC2             0x00000020      
#define TC_TIOA1XC2             0x00000030      


#endif /* AT91_TC_H */