ser_avr.c File Reference
AVR UART and SPI I/O driver (Implementation). More...
#include "hw/hw_ser.h"#include <hw/hw_cpufreq.h>#include "cfg/cfg_ser.h"#include <cfg/macros.h>#include <cfg/debug.h>#include <cfg/cfg_arch.h>#include <drv/ser.h>#include <drv/ser_p.h>#include <drv/timer.h>#include <struct/fifobuf.h>#include <avr/io.h>#include <avr/signal.h>Go to the source code of this file.
Data Structures | |
| struct | AvrSerial |
| Internal hardware state structure. More... | |
Defines | |
Hardware handshake (RTS/CTS). | |
| #define | RTS_ON do {} while (0) |
| #define | RTS_OFF do {} while (0) |
| #define | IS_CTS_ON true |
| #define | EIMSKF_CTS 0 |
| Dummy value, must be overridden. | |
Overridable serial bus hooks | |
| #define | SER_UART0_BUS_TXOFF |
| Invoked after the last character has been transmitted. | |
| #define | SER_UART1_BUS_TXOFF |
Overridable SPI hooks | |
| #define | SER_SPI_BUS_TXINIT |
| Default TXINIT macro - invoked in spi_init() The default is no action. | |
| #define | SER_SPI_BUS_TXCLOSE |
| Invoked after the last character has been transmitted. | |
Functions | |
| SIGNAL (SIG_CTS) | |
| This interrupt is triggered when the CTS line goes high. | |
| SIGNAL (USART0_UDRE_vect) | |
| Serial 0 TX interrupt handler. | |
| SIGNAL (SIG_UART0_TRANS) | |
| Serial port 0 TX complete interrupt handler. | |
| SIGNAL (USART1_UDRE_vect) | |
| Serial 1 TX interrupt handler. | |
| SIGNAL (USART1_TX_vect) | |
| Serial port 1 TX complete interrupt handler. | |
| SIGNAL (USART0_RX_vect) | |
| Serial 0 RX complete interrupt handler. | |
| SIGNAL (USART1_RX_vect) | |
| Serial 1 RX complete interrupt handler. | |
| SIGNAL (SIG_SPI) | |
| SPI interrupt handler. | |
Detailed Description
AVR UART and SPI I/O driver (Implementation).
- Version:
- Id
- ser_avr.c 2871 2009-09-02 18:23:55Z batt
Definition in file ser_avr.c.
Define Documentation
| #define SER_SPI_BUS_TXCLOSE |
| #define SER_UART0_BUS_TXOFF |
| #define SER_UART1_BUS_TXOFF |
- See also:
- SER_UART0_BUS_TXOFF
Function Documentation
| SIGNAL | ( | USART1_RX_vect | ) |
Serial 1 RX complete interrupt handler.
This handler is interruptible. Interrupt are reenabled as soon as recv complete interrupt is disabled. Using INTERRUPT() is troublesome when the serial is heavily loaded, because an interrupt could be retriggered when executing the handler prologue before RXCIE is disabled.
- See also:
- SIGNAL(USART1_RX_vect)
| SIGNAL | ( | USART0_RX_vect | ) |
Serial 0 RX complete interrupt handler.
This handler is interruptible. Interrupt are reenabled as soon as recv complete interrupt is disabled. Using INTERRUPT() is troublesome when the serial is heavily loaded, because an interrupt could be retriggered when executing the handler prologue before RXCIE is disabled.
- Note:
- The code that re-enables interrupts is commented out because in some nasty cases the interrupt is retriggered. This is probably due to the RXC flag being set before RXCIE is cleared. Unfortunately the RXC flag is read-only and can't be cleared by code.
| SIGNAL | ( | USART1_TX_vect | ) |
| SIGNAL | ( | SIG_UART0_TRANS | ) |
Serial port 0 TX complete interrupt handler.
This IRQ is usually disabled. The UDR-empty interrupt enables it when there's no more data to transmit. We need to wait until the last character has been transmitted before switching the 485 transceiver to receive mode.
The txfifo might have been refilled by putchar() while we were waiting for the transmission complete interrupt. In this case, we must restart the UDR empty interrupt, otherwise we'd stop the serial port with some data still pending in the buffer.
