clock_stm32.h File Reference
Low-level clocking driver for Cortex-M3 STM32. More...
Go to the source code of this file.
Defines | |
| #define | CR_OFFSET (RCC_OFFSET + 0x00) |
| CR Register. | |
| #define | CFGR_OFFSET (RCC_OFFSET + 0x04) |
| CFGR Register. | |
| #define | BDCR_OFFSET (RCC_OFFSET + 0x20) |
| BDCR Register. | |
| #define | CSR_OFFSET (RCC_OFFSET + 0x24) |
| CSR Register. | |
| #define | CR_HSEBYP_RESET (0xFFFBFFFF) |
| RCC registers bit mask. | |
| #define | RCC_APB1_TIM2 (0x00000001) |
| RCC register: APB1 peripheral. | |
| #define | RCC_APB2_AFIO (0x00000001) |
| RCC register: APB2 peripheral. | |
Detailed Description
Low-level clocking driver for Cortex-M3 STM32.
Definition in file clock_stm32.h.
