attr.h

Go to the documentation of this file.
00001 
00040 #ifndef CPU_ATTR_H
00041 #define CPU_ATTR_H
00042 
00043 #include "detect.h"
00044 
00045 #include "cfg/cfg_proc.h"      /* CONFIG_KERN_PREEMPT */
00046 #include "cfg/cfg_attr.h"      /* CONFIG_FAST_MEM */
00047 
00048 
00053 #define CPU_BIG_ENDIAN    0x1234
00054 #define CPU_LITTLE_ENDIAN 0x3412 /* Look twice, pal. This is not a bug. */
00055 /*\}*/
00056 
00058 #define CPU_HEADER(module)          PP_STRINGIZE(drv/PP_CAT3(module, _, CPU_ID).h)
00059 
00061 #define CPU_CSOURCE(module)         PP_STRINGIZE(drv/PP_CAT3(module, _, CPU_ID).c)
00062 
00063 
00064 #if CPU_I196
00065 
00066     #define NOP                     nop_instruction()
00067 
00068     #define CPU_REG_BITS            16
00069     #define CPU_REGS_CNT            16
00070     #define CPU_BYTE_ORDER          CPU_LITTLE_ENDIAN
00071     #define CPU_HARVARD             0
00072 
00074     #define CPU_RAM_START       0x100
00075 
00076 #elif CPU_X86
00077 
00078     #define CPU_REGS_CNT            7
00079     #define CPU_BYTE_ORDER          CPU_LITTLE_ENDIAN
00080     #define CPU_HARVARD             0
00081 
00082     #if CPU_X86_64
00083         #define CPU_REG_BITS    64
00084 
00085         #ifdef __WIN64__
00086             /* WIN64 is an IL32-P64 weirdo. */
00087             #define SIZEOF_LONG  4
00088         #endif
00089     #else
00090         #define CPU_REG_BITS    32
00091     #endif
00092 
00094     #define CPU_RAM_START      0x1000
00095 
00096     #ifdef __GNUC__
00097         #define NOP         asm volatile ("nop")
00098         /* This is a good thing to insert into busy-wait loops. */
00099         #define PAUSE       asm volatile ("rep; nop" ::: "memory")
00100         #define BREAKPOINT  asm volatile ("int3" ::)
00101     #endif
00102 
00103 #elif CPU_ARM
00104 
00105     #define CPU_REG_BITS           32
00106     #define CPU_REGS_CNT           16
00107     #define CPU_HARVARD            0
00108 
00110     #if CPU_ARM_AT91
00111         #define CPU_RAM_START       0x00200000
00112     #elif CPU_ARM_LPC2
00113         #define CPU_RAM_START       0x40000000
00114     #else
00115         #warning Fix CPU_RAM_START address for your ARM, default value set to 0x200
00116         #define CPU_RAM_START       0x200
00117     #endif
00118 
00119     #ifdef __IAR_SYSTEMS_ICC__
00120         #warning Check CPU_BYTE_ORDER
00121         #define CPU_BYTE_ORDER (__BIG_ENDIAN__ ? CPU_BIG_ENDIAN : CPU_LITTLE_ENDIAN)
00122 
00123         #define NOP            __no_operation()
00124 
00125     #else /* GCC and compatibles */
00126 
00127         #if defined(__ARMEB__)
00128             #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
00129         #elif defined(__ARMEL__)
00130             #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
00131         #else
00132             #error Unable to detect ARM endianness!
00133         #endif
00134 
00135         #define NOP            asm volatile ("mov r0,r0" ::)
00136         #define BREAKPOINT  /* asm("bkpt 0") DOES NOT WORK */
00137 
00138         #if CONFIG_FAST_MEM
00139 
00147             #define FAST_FUNC __attribute__((section(".data")))
00148 
00154             #define FAST_RODATA __attribute__((section(".data")))
00155 
00156         #else // !CONFIG_FAST_MEM
00157             #define FAST_RODATA 
00158             #define FAST_FUNC 
00159         #endif
00160 
00161         /*
00162          * Function attribute to move it into ram memory.
00163          */
00164         #define RAM_FUNC __attribute__((section(".data")))
00165 
00166     #endif /* !__IAR_SYSTEMS_ICC_ */
00167 #elif CPU_CM3
00168 
00169     #define CPU_REG_BITS           32
00170     #define CPU_REGS_CNT           16
00171     #define CPU_HARVARD            0
00172 
00174     #if (CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962 || CPU_CM3_STM32F103RB || CPU_CM3_SAM3)
00175         #define CPU_RAM_START 0x20000000
00176     #else
00177         #warning Fix CPU_RAM_START address for your Cortex-M3, default value set to 0x20000000
00178         #define CPU_RAM_START 0x20000000
00179     #endif
00180 
00181     #if defined(__ARMEB__)
00182         #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
00183     #elif defined(__ARMEL__)
00184         #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
00185     #else
00186         #error Unable to detect Cortex-M3 endianess!
00187     #endif
00188 
00189     #define NOP         asm volatile ("nop")
00190     #define PAUSE       asm volatile ("wfi" ::: "memory")
00191     #define BREAKPOINT  /* asm("bkpt 0") DOES NOT WORK */
00192 
00193 #elif CPU_PPC
00194 
00195     #define CPU_REG_BITS           (CPU_PPC32 ? 32 : 64)
00196     #define CPU_REGS_CNT           FIXME
00197     #define CPU_BYTE_ORDER         (__BIG_ENDIAN__ ? CPU_BIG_ENDIAN : CPU_LITTLE_ENDIAN)
00198     #define CPU_HARVARD            0
00199 
00201     #define CPU_RAM_START          0x1000
00202 
00203     #ifdef __GNUC__
00204         #define NOP         asm volatile ("nop" ::)
00205         #define BREAKPOINT  asm volatile ("twge 2,2" ::)
00206     #endif
00207 
00208 #elif CPU_DSP56K
00209 
00210     #define CPU_REG_BITS            16
00211     #define CPU_REGS_CNT            FIXME
00212     #define CPU_BYTE_ORDER          CPU_BIG_ENDIAN
00213     #define CPU_HARVARD     1
00214 
00215     /* Memory is word-addessed in the DSP56K */
00216     #define CPU_BITS_PER_CHAR  16
00217     #define SIZEOF_SHORT        1
00218     #define SIZEOF_INT          1
00219     #define SIZEOF_LONG         2
00220     #define SIZEOF_PTR          1
00221 
00223     #define CPU_RAM_START       0x200
00224 
00225     #define NOP                     asm(nop)
00226     #define BREAKPOINT              asm(debug)
00227 
00228 #elif CPU_AVR
00229 
00230     #define NOP                     asm volatile ("nop" ::)
00231 
00232     #define CPU_REG_BITS            8
00233     #define CPU_REGS_CNT           33 /* Includes SREG */
00234     #define CPU_BYTE_ORDER          CPU_LITTLE_ENDIAN
00235     #define CPU_HARVARD             1
00236 
00238     #if CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA103
00239         #define CPU_RAM_START       0x60
00240     #elif CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
00241         #define CPU_RAM_START       0x100
00242     #elif CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280
00243         #define CPU_RAM_START       0x200
00244     #else
00245         #warning Fix CPU_RAM_START address for your AVR, default value set to 0x100
00246         #define CPU_RAM_START       0x100
00247     #endif
00248 
00249 #elif CPU_MSP430
00250 
00251     #define CPU_REG_BITS            16
00252     #define CPU_REGS_CNT            12
00253     #define CPU_BYTE_ORDER          CPU_LITTLE_ENDIAN
00254     #define CPU_HARVARD             0
00255 
00257     #define CPU_RAM_START           0x200
00258 
00259     #define NOP                     __asm__ __volatile__ ("nop")
00260 
00261 #else
00262     #error No CPU_... defined.
00263 #endif
00264 
00265 #ifndef BREAKPOINT
00266 #define BREAKPOINT /* nop */
00267 #endif
00268 
00269 #ifndef FAST_FUNC
00270 
00271     #define FAST_FUNC /* */
00272 #endif
00273 
00274 #ifndef FAST_RODATA
00275 
00276     #define FAST_RODATA /* */
00277 #endif
00278 
00279 #ifndef PAUSE
00280 
00281     #define PAUSE   {NOP; MEMORY_BARRIER;}
00282 #endif
00283 
00284 #endif /* CPU_ATTR_H */