at91_pio.h

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00001 
00040 /*
00041  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071 
00072 #ifndef AT91_PIO_H
00073 #define AT91_PIO_H
00074 
00076 /*\{*/
00077 #define PIO_PER_OFF     0x00000000  ///< PIO enable register offset.
00078 #define PIO_PDR_OFF     0x00000004  ///< PIO disable register offset.
00079 #define PIO_PSR_OFF     0x00000008  ///< PIO status register offset.
00080 #define PIO_OER_OFF     0x00000010  ///< Output enable register offset.
00081 #define PIO_ODR_OFF     0x00000014  ///< Output disable register offset.
00082 #define PIO_OSR_OFF     0x00000018  ///< Output status register offset.
00083 #define PIO_IFER_OFF    0x00000020  ///< Input filter enable register offset.
00084 #define PIO_IFDR_OFF    0x00000024  ///< Input filter disable register offset.
00085 #define PIO_IFSR_OFF    0x00000028  ///< Input filter status register offset.
00086 #define PIO_SODR_OFF    0x00000030  ///< Set output data register offset.
00087 #define PIO_CODR_OFF    0x00000034  ///< Clear output data register offset.
00088 #define PIO_ODSR_OFF    0x00000038  ///< Output data status register offset.
00089 #define PIO_PDSR_OFF    0x0000003C  ///< Pin data status register offset.
00090 #define PIO_IER_OFF     0x00000040  ///< Interrupt enable register offset.
00091 #define PIO_IDR_OFF     0x00000044  ///< Interrupt disable register offset.
00092 #define PIO_IMR_OFF     0x00000048  ///< Interrupt mask register offset.
00093 #define PIO_ISR_OFF     0x0000004C  ///< Interrupt status register offset.
00094 #if PIO_HAS_MULTIDRIVER
00095 #define PIO_MDER_OFF    0x00000050  ///< Multi-driver enable register offset.
00096 #define PIO_MDDR_OFF    0x00000054  ///< Multi-driver disable register offset.
00097 #define PIO_MDSR_OFF    0x00000058  ///< Multi-driver status register offset.
00098 #endif /* PIO_HAS_MULTIDRIVER */
00099 #if PIO_HAS_PULLUP
00100 #define PIO_PUDR_OFF    0x00000060  ///< Pull-up disable register offset.
00101 #define PIO_PUER_OFF    0x00000064  ///< Pull-up enable register offset.
00102 #define PIO_PUSR_OFF    0x00000068  ///< Pull-up status register offset.
00103 #endif /* PIO_HAS_PULLUP */
00104 #if PIO_HAS_PERIPHERALSELECT
00105 #define PIO_ASR_OFF     0x00000070  ///< PIO peripheral A select register offset.
00106 #define PIO_BSR_OFF     0x00000074  ///< PIO peripheral B select register offset.
00107 #define PIO_ABSR_OFF    0x00000078  ///< PIO peripheral AB status register offset.
00108 #endif /* PIO_HAS_PERIPHERALSELECT */
00109 #if PIO_HAS_OUTPUTWRITEENABLE
00110 #define PIO_OWER_OFF    0x000000A0  ///< PIO output write enable register offset.
00111 #define PIO_OWDR_OFF    0x000000A4  ///< PIO output write disable register offset.
00112 #define PIO_OWSR_OFF    0x000000A8  ///< PIO output write status register offset.
00113 #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00114 /*\}*/
00115 
00117 /*\{*/
00118 #if defined(PIO_BASE)
00119     #define PIO_ACCESS(offset) (*((reg32_t *)(PIO_BASE + (offset))))
00120 
00121     #define PIO_PER     PIO_ACCESS(PIO_PER_OFF)    ///< PIO enable register address.
00122     #define PIO_PDR     PIO_ACCESS(PIO_PDR_OFF)    ///< PIO disable register address.
00123     #define PIO_PSR     PIO_ACCESS(PIO_PSR_OFF)    ///< PIO status register address.
00124     #define PIO_OER     PIO_ACCESS(PIO_OER_OFF)    ///< Output enable register address.
00125     #define PIO_ODR     PIO_ACCESS(PIO_ODR_OFF)    ///< Output disable register address.
00126     #define PIO_OSR     PIO_ACCESS(PIO_OSR_OFF)    ///< Output status register address.
00127     #define PIO_IFER    PIO_ACCESS(PIO_IFER_OFF)   ///< Input filter enable register address.
00128     #define PIO_IFDR    PIO_ACCESS(PIO_IFDR_OFF)   ///< Input filter disable register address.
00129     #define PIO_IFSR    PIO_ACCESS(PIO_IFSR_OFF)   ///< Input filter status register address.
00130     #define PIO_SODR    PIO_ACCESS(PIO_SODR_OFF)   ///< Set output data register address.
00131     #define PIO_CODR    PIO_ACCESS(PIO_CODR_OFF)   ///< Clear output data register address.
00132     #define PIO_ODSR    PIO_ACCESS(PIO_ODSR_OFF)   ///< Output data status register address.
00133     #define PIO_PDSR    PIO_ACCESS(PIO_PDSR_OFF)   ///< Pin data status register address.
00134     #define PIO_IER     PIO_ACCESS(PIO_IER_OFF)    ///< Interrupt enable register address.
00135     #define PIO_IDR     PIO_ACCESS(PIO_IDR_OFF)    ///< Interrupt disable register address.
00136     #define PIO_IMR     PIO_ACCESS(PIO_IMR_OFF)    ///< Interrupt mask register address.
00137     #define PIO_ISR     PIO_ACCESS(PIO_ISR_OFF)    ///< Interrupt status register address.
00138     #if PIO_HAS_MULTIDRIVER
00139     #define PIO_MDER    PIO_ACCESS(PIO_MDER_OFF)   ///< Multi-driver enable register address.
00140     #define PIO_MDDR    PIO_ACCESS(PIO_MDDR_OFF)   ///< Multi-driver disable register address.
00141     #define PIO_MDSR    PIO_ACCESS(PIO_MDSR_OFF)   ///< Multi-driver status register address.
00142     #endif /* PIO_HAS_MULTIDRIVER */
00143     #if PIO_HAS_PULLUP
00144     #define PIO_PUDR    PIO_ACCESS(PIO_PUDR_OFF)   ///< Pull-up disable register address.
00145     #define PIO_PUER    PIO_ACCESS(PIO_PUER_OFF)   ///< Pull-up enable register address.
00146     #define PIO_PUSR    PIO_ACCESS(PIO_PUSR_OFF)   ///< Pull-up status register address.
00147     #endif /* PIO_HAS_PULLUP */
00148     #if PIO_HAS_PERIPHERALSELECT
00149     #define PIO_ASR     PIO_ACCESS(PIO_ASR_OFF)    ///< PIO peripheral A select register address.
00150     #define PIO_BSR     PIO_ACCESS(PIO_BSR_OFF)    ///< PIO peripheral B select register address.
00151     #define PIO_ABSR    PIO_ACCESS(PIO_ABSR_OFF)   ///< PIO peripheral AB status register address.
00152     #endif /* PIO_HAS_PERIPHERALSELECT */
00153     #if PIO_HAS_OUTPUTWRITEENABLE
00154     #define PIO_OWER    PIO_ACCESS(PIO_OWER_OFF)   ///< PIO output write enable register address.
00155     #define PIO_OWDR    PIO_ACCESS(PIO_OWDR_OFF)   ///< PIO output write disable register address.
00156     #define PIO_OWSR    PIO_ACCESS(PIO_OWSR_OFF)   ///< PIO output write status register address.
00157     #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00158 #endif /* PIO_BASE */
00159 /*\}*/
00160 
00162 /*\{*/
00163 #if defined(PIOA_BASE)
00164     #define PIOA_ACCESS(offset) (*((reg32_t *)(PIOA_BASE + (offset))))
00165 
00166     #define PIOA_PER    PIOA_ACCESS(PIO_PER_OFF)   ///< PIO enable register address.
00167     #define PIOA_PDR    PIOA_ACCESS(PIO_PDR_OFF)   ///< PIO disable register address.
00168     #define PIOA_PSR    PIOA_ACCESS(PIO_PSR_OFF)   ///< PIO status register address.
00169     #define PIOA_OER    PIOA_ACCESS(PIO_OER_OFF)   ///< Output enable register address.
00170     #define PIOA_ODR    PIOA_ACCESS(PIO_ODR_OFF)   ///< Output disable register address.
00171     #define PIOA_OSR    PIOA_ACCESS(PIO_OSR_OFF)   ///< Output status register address.
00172     #define PIOA_IFER   PIOA_ACCESS(PIO_IFER_OFF)  ///< Input filter enable register address.
00173     #define PIOA_IFDR   PIOA_ACCESS(PIO_IFDR_OFF)  ///< Input filter disable register address.
00174     #define PIOA_IFSR   PIOA_ACCESS(PIO_IFSR_OFF)  ///< Input filter status register address.
00175     #define PIOA_SODR   PIOA_ACCESS(PIO_SODR_OFF)  ///< Set output data register address.
00176     #define PIOA_CODR   PIOA_ACCESS(PIO_CODR_OFF)  ///< Clear output data register address.
00177     #define PIOA_ODSR   PIOA_ACCESS(PIO_ODSR_OFF)  ///< Output data status register address.
00178     #define PIOA_PDSR   PIOA_ACCESS(PIO_PDSR_OFF)  ///< Pin data status register address.
00179     #define PIOA_IER    PIOA_ACCESS(PIO_IER_OFF)   ///< Interrupt enable register address.
00180     #define PIOA_IDR    PIOA_ACCESS(PIO_IDR_OFF)   ///< Interrupt disable register address.
00181     #define PIOA_IMR    PIOA_ACCESS(PIO_IMR_OFF)   ///< Interrupt mask register address.
00182     #define PIOA_ISR    PIOA_ACCESS(PIO_ISR_OFF)   ///< Interrupt status register address.
00183     #if PIO_HAS_MULTIDRIVER
00184     #define PIOA_MDER   PIOA_ACCESS(PIO_MDER_OFF)  ///< Multi-driver enable register address.
00185     #define PIOA_MDDR   PIOA_ACCESS(PIO_MDDR_OFF)  ///< Multi-driver disable register address.
00186     #define PIOA_MDSR   PIOA_ACCESS(PIO_MDSR_OFF)  ///< Multi-driver status register address.
00187     #endif /* PIO_HAS_MULTIDRIVER */
00188     #if PIO_HAS_PULLUP
00189     #define PIOA_PUDR   PIOA_ACCESS(PIO_PUDR_OFF)  ///< Pull-up disable register address.
00190     #define PIOA_PUER   PIOA_ACCESS(PIO_PUER_OFF)  ///< Pull-up enable register address.
00191     #define PIOA_PUSR   PIOA_ACCESS(PIO_PUSR_OFF)  ///< Pull-up status register address.
00192     #endif /* PIO_HAS_PULLUP */
00193     #if PIO_HAS_PERIPHERALSELECT
00194     #define PIOA_ASR    PIOA_ACCESS(PIO_ASR_OFF)   ///< PIO peripheral A select register address.
00195     #define PIOA_BSR    PIOA_ACCESS(PIO_BSR_OFF)   ///< PIO peripheral B select register address.
00196     #define PIOA_ABSR   PIOA_ACCESS(PIO_ABSR_OFF)  ///< PIO peripheral AB status register address.
00197     #endif /* PIO_HAS_PERIPHERALSELECT */
00198     #if PIO_HAS_OUTPUTWRITEENABLE
00199     #define PIOA_OWER   PIOA_ACCESS(PIO_OWER_OFF)  ///< PIO output write enable register address.
00200     #define PIOA_OWDR   PIOA_ACCESS(PIO_OWDR_OFF)  ///< PIO output write disable register address.
00201     #define PIOA_OWSR   PIOA_ACCESS(PIO_OWSR_OFF)  ///< PIO output write status register address.
00202     #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00203 #endif /* PIOA_BASE */
00204 /*\}*/
00205 
00207 /*\{*/
00208 #if defined(PIOB_BASE)
00209     #define PIOB_ACCESS(offset) (*((reg32_t *)(PIOB_BASE + (offset))))
00210 
00211     #define PIOB_PER    PIOB_ACCESS(PIO_PER_OFF)   ///< PIO enable register address.
00212     #define PIOB_PDR    PIOB_ACCESS(PIO_PDR_OFF)   ///< PIO disable register address.
00213     #define PIOB_PSR    PIOB_ACCESS(PIO_PSR_OFF)   ///< PIO status register address.
00214     #define PIOB_OER    PIOB_ACCESS(PIO_OER_OFF)   ///< Output enable register address.
00215     #define PIOB_ODR    PIOB_ACCESS(PIO_ODR_OFF)   ///< Output disable register address.
00216     #define PIOB_OSR    PIOB_ACCESS(PIO_OSR_OFF)   ///< Output status register address.
00217     #define PIOB_IFER   PIOB_ACCESS(PIO_IFER_OFF)  ///< Input filter enable register address.
00218     #define PIOB_IFDR   PIOB_ACCESS(PIO_IFDR_OFF)  ///< Input filter disable register address.
00219     #define PIOB_IFSR   PIOB_ACCESS(PIO_IFSR_OFF)  ///< Input filter status register address.
00220     #define PIOB_SODR   PIOB_ACCESS(PIO_SODR_OFF)  ///< Set output data register address.
00221     #define PIOB_CODR   PIOB_ACCESS(PIO_CODR_OFF)  ///< Clear output data register address.
00222     #define PIOB_ODSR   PIOB_ACCESS(PIO_ODSR_OFF)  ///< Output data status register address.
00223     #define PIOB_PDSR   PIOB_ACCESS(PIO_PDSR_OFF)  ///< Pin data status register address.
00224     #define PIOB_IER    PIOB_ACCESS(PIO_IER_OFF)   ///< Interrupt enable register address.
00225     #define PIOB_IDR    PIOB_ACCESS(PIO_IDR_OFF)   ///< Interrupt disable register address.
00226     #define PIOB_IMR    PIOB_ACCESS(PIO_IMR_OFF)   ///< Interrupt mask register address.
00227     #define PIOB_ISR    PIOB_ACCESS(PIO_ISR_OFF)   ///< Interrupt status register address.
00228     #if PIO_HAS_MULTIDRIVER
00229     #define PIOB_MDER   PIOB_ACCESS(PIO_MDER_OFF)  ///< Multi-driver enable register address.
00230     #define PIOB_MDDR   PIOB_ACCESS(PIO_MDDR_OFF)  ///< Multi-driver disable register address.
00231     #define PIOB_MDSR   PIOB_ACCESS(PIO_MDSR_OFF)  ///< Multi-driver status register address.
00232     #endif /* PIO_HAS_MULTIDRIVER */
00233     #if PIO_HAS_PULLUP
00234     #define PIOB_PUDR   PIOB_ACCESS(PIO_PUDR_OFF)  ///< Pull-up disable register address.
00235     #define PIOB_PUER   PIOB_ACCESS(PIO_PUER_OFF)  ///< Pull-up enable register address.
00236     #define PIOB_PUSR   PIOB_ACCESS(PIO_PUSR_OFF)  ///< Pull-up status register address.
00237     #endif /* PIO_HAS_PULLUP */
00238     #if PIO_HAS_PERIPHERALSELECT
00239     #define PIOB_ASR    PIOB_ACCESS(PIO_ASR_OFF)   ///< PIO peripheral A select register address.
00240     #define PIOB_BSR    PIOB_ACCESS(PIO_BSR_OFF)   ///< PIO peripheral B select register address.
00241     #define PIOB_ABSR   PIOB_ACCESS(PIO_ABSR_OFF)  ///< PIO peripheral AB status register address.
00242     #endif /* PIO_HAS_PERIPHERALSELECT */
00243     #if PIO_HAS_OUTPUTWRITEENABLE
00244     #define PIOB_OWER   PIOB_ACCESS(PIO_OWER_OFF)  ///< PIO output write enable register address.
00245     #define PIOB_OWDR   PIOB_ACCESS(PIO_OWDR_OFF)  ///< PIO output write disable register address.
00246     #define PIOB_OWSR   PIOB_ACCESS(PIO_OWSR_OFF)  ///< PIO output write status register address.
00247     #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00248 #endif /* PIOB_BASE */
00249 /*\}*/
00250 
00252 /*\{*/
00253 #if defined(PIOC_BASE)
00254     #define PIOC_ACCESS(offset) (*((reg32_t *)(PIOC_BASE + (offset))))
00255 
00256     #define PIOC_PER    PIOC_ACCESS(PIO_PER_OFF)   ///< PIO enable register address.
00257     #define PIOC_PDR    PIOC_ACCESS(PIO_PDR_OFF)   ///< PIO disable register address.
00258     #define PIOC_PSR    PIOC_ACCESS(PIO_PSR_OFF)   ///< PIO status register address.
00259     #define PIOC_OER    PIOC_ACCESS(PIO_OER_OFF)   ///< Output enable register address.
00260     #define PIOC_ODR    PIOC_ACCESS(PIO_ODR_OFF)   ///< Output disable register address.
00261     #define PIOC_OSR    PIOC_ACCESS(PIO_OSR_OFF)   ///< Output status register address.
00262     #define PIOC_IFER   PIOC_ACCESS(PIO_IFER_OFF)  ///< Input filter enable register address.
00263     #define PIOC_IFDR   PIOC_ACCESS(PIO_IFDR_OFF)  ///< Input filter disable register address.
00264     #define PIOC_IFSR   PIOC_ACCESS(PIO_IFSR_OFF)  ///< Input filter status register address.
00265     #define PIOC_SODR   PIOC_ACCESS(PIO_SODR_OFF)  ///< Set output data register address.
00266     #define PIOC_CODR   PIOC_ACCESS(PIO_CODR_OFF)  ///< Clear output data register address.
00267     #define PIOC_ODSR   PIOC_ACCESS(PIO_ODSR_OFF)  ///< Output data status register address.
00268     #define PIOC_PDSR   PIOC_ACCESS(PIO_PDSR_OFF)  ///< Pin data status register address.
00269     #define PIOC_IER    PIOC_ACCESS(PIO_IER_OFF)   ///< Interrupt enable register address.
00270     #define PIOC_IDR    PIOC_ACCESS(PIO_IDR_OFF)   ///< Interrupt disable register address.
00271     #define PIOC_IMR    PIOC_ACCESS(PIO_IMR_OFF)   ///< Interrupt mask register address.
00272     #define PIOC_ISR    PIOC_ACCESS(PIO_ISR_OFF)   ///< Interrupt status register address.
00273     #if PIO_HAS_MULTIDRIVER
00274     #define PIOC_MDER   PIOC_ACCESS(PIO_MDER_OFF)  ///< Multi-driver enable register address.
00275     #define PIOC_MDDR   PIOC_ACCESS(PIO_MDDR_OFF)  ///< Multi-driver disable register address.
00276     #define PIOC_MDSR   PIOC_ACCESS(PIO_MDSR_OFF)  ///< Multi-driver status register address.
00277     #endif /* PIO_HAS_MULTIDRIVER */
00278     #if PIO_HAS_PULLUP
00279     #define PIOC_PUDR   PIOC_ACCESS(PIO_PUDR_OFF)  ///< Pull-up disable register address.
00280     #define PIOC_PUER   PIOC_ACCESS(PIO_PUER_OFF)  ///< Pull-up enable register address.
00281     #define PIOC_PUSR   PIOC_ACCESS(PIO_PUSR_OFF)  ///< Pull-up status register address.
00282     #endif /* PIO_HAS_PULLUP */
00283     #if PIO_HAS_PERIPHERALSELECT
00284     #define PIOC_ASR    PIOC_ACCESS(PIO_ASR_OFF)   ///< PIO peripheral A select register address.
00285     #define PIOC_BSR    PIOC_ACCESS(PIO_BSR_OFF)   ///< PIO peripheral B select register address.
00286     #define PIOC_ABSR   PIOC_ACCESS(PIO_ABSR_OFF)  ///< PIO peripheral AB status register address.
00287     #endif /* PIO_HAS_PERIPHERALSELECT */
00288     #if PIO_HAS_OUTPUTWRITEENABLE
00289     #define PIOC_OWER   PIOC_ACCESS(PIO_OWER_OFF)  ///< PIO output write enable register address.
00290     #define PIOC_OWDR   PIOC_ACCESS(PIO_OWDR_OFF)  ///< PIO output write disable register address.
00291     #define PIOC_OWSR   PIOC_ACCESS(PIO_OWSR_OFF)  ///< PIO output write status register address.
00292     #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00293 #endif /* PIOC_BASE */
00294 /*\}*/
00295 
00296 #endif /* AT91_PIO_H */
at91_pio.h

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