kdebug_msp430.c

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#include "kdebug_msp430.h"  /* for UART clock source definitions */

#include "hw/hw_ser.h"      /* bus macros overrides */
#include "cfg/cfg_debug.h"

#include <cfg/macros.h>     /* for DIV_ROUND */

#include <cpu/types.h>
#include <cpu/attr.h>

#include <io.h>

#if CONFIG_KDEBUG_PORT == 0

    #ifndef KDBG_UART0_BUS_INIT
    #define KDBG_UART0_BUS_INIT  do {} while (0)
    #endif
    #ifndef KDBG_UART0_BUS_RX
    #define KDBG_UART0_BUS_RX    do {} while (0)
    #endif
    #ifndef KDBG_UART0_BUS_TX
    #define KDBG_UART0_BUS_TX    do {} while (0)
    #endif

    /* USCI Register definitions */
    #define UCSTAT  UCA0STAT
    #define UCTXBUF UCA0TXBUF
    #define UCRXBUF UCA0RXBUF
    #define UCTXIFG UCA0TXIFG
    #define UCRXIFG UCA0RXIFG
    #define UCTXIE  UCA0TXIE
    #define UCRXIE  UCA0RXIE
    #define UCCTL0  UCA0CTL0
    #define UCCTL1  UCA0CTL1
    #define UCBR0   UCA0BR0
    #define UCBR1   UCA0BR1
    #define UCMCTL  UCA0MCTL
    #define IE      IE2
    #define IFG     IFG2

    #if CPU_MSP430F2274
        #define KDBG_MSP430_UART_PINS_INIT()    do{ P3SEL = 0x30; }while(0)
    #endif

#else

    #if CPU_MSP430F2274
        #error only 1 UART availbale, CONFIG_KDEBUG_PORT should be 0
    #endif

#endif

#define KDBG_WAIT_READY()     do { while((UCSTAT & UCBUSY)); } while(0)
#define KDBG_WAIT_TXDONE()    do { while(!(IFG & UCTXIFG)); } while(0)

#define KDBG_WRITE_CHAR(c)    do { UCTXBUF = (c); } while(0)

#define KDBG_MASK_IRQ(old)    do { \
    (old) = IE; \
    IE &= ~(UCTXIE|UCRXIE);\
} while(0)

#define KDBG_RESTORE_IRQ(old) do { \
    KDBG_WAIT_TXDONE(); \
    IE = (old); \
} while(0)

#if CONFIG_KDEBUG_CLOCK_FREQ
    #define KDBG_MSP430_FREQ CONFIG_KDEBUG_CLOCK_FREQ
#else
    #define KDBG_MSP430_FREQ CPU_FREQ
#endif

typedef uint8_t kdbg_irqsave_t;

INLINE void kdbg_hw_init(void)
{
    /* Compute the clock prescaler for the desired baudrate */
    uint16_t quot = DIV_ROUND(KDBG_MSP430_FREQ, CONFIG_KDEBUG_BAUDRATE);
    KDBG_MSP430_UART_PINS_INIT();       // Configure USCI TX/RX pins

#if (CONFIG_KDEBUG_CLOCK_SOURCE == KDBG_UART_SMCLK)
    UCCTL1 |= UCSSEL_SMCLK;
#else
    UCCTL1 |= UCSSEL_ACLK;
#endif

    UCBR0   = quot & 0xFF;              // Setup clock prescaler for the UART
    UCBR1   = quot >> 8;

    UCMCTL  = UCBRS0;                   // No Modulation
    UCCTL0  = 0;                        // Default UART settings (8N1)
    UCCTL1 &= ~UCSWRST;                 // Initialize USCI state machine
    KDBG_MASK_IRQ(IE2);                 // Disable USCI interrupts
}