sam3_ints.h

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00001 
00036 #ifndef SAM3_INTS_H
00037 #define SAM3_INTS_H
00038 
00042 /*\{*/
00043 #define FAULT_NMI               2           ///< NMI fault
00044 #define FAULT_HARD              3           ///< Hard fault
00045 #define FAULT_MPU               4           ///< MPU fault
00046 #define FAULT_BUS               5           ///< Bus fault
00047 #define FAULT_USAGE             6           ///< Usage fault
00048 #define FAULT_SVCALL            11          ///< SVCall
00049 #define FAULT_DEBUG             12          ///< Debug monitor
00050 #define FAULT_PENDSV            14          ///< PendSV
00051 #define FAULT_SYSTICK           15          ///< System Tick
00052 /*\}*/
00053 
00057 /*\{*/
00058 #define INT_PERIPH_BASE  16
00059 
00060 #if CPU_CM3_SAM3N
00061     #define INT_SUPC        (INT_PERIPH_BASE + SUPC_ID)
00062     #define INT_RSTC        (INT_PERIPH_BASE + RSTC_ID)
00063     #define INT_RTC         (INT_PERIPH_BASE + RTC_ID)
00064     #define INT_RTT         (INT_PERIPH_BASE + RTT_ID)
00065     #define INT_WDT         (INT_PERIPH_BASE + WDT_ID)
00066     #define INT_PMC         (INT_PERIPH_BASE + PMC_ID)
00067     #define INT_EFC         (INT_PERIPH_BASE + EFC_ID)
00068     #define INT_UART0       (INT_PERIPH_BASE + UART0_ID)
00069     #define INT_UART1       (INT_PERIPH_BASE + UART1_ID)
00070     #define INT_PIOA        (INT_PERIPH_BASE + PIOA_ID)
00071     #define INT_PIOB        (INT_PERIPH_BASE + PIOB_ID)
00072     #define INT_PIOC        (INT_PERIPH_BASE + PIOC_ID)
00073     #define INT_US0         (INT_PERIPH_BASE + US0_ID)
00074     #define INT_US1         (INT_PERIPH_BASE + US1_ID)
00075     #define INT_TWI0        (INT_PERIPH_BASE + TWI0_ID)
00076     #define INT_TWI1        (INT_PERIPH_BASE + TWI1_ID)
00077     #define INT_SPI0        (INT_PERIPH_BASE + SPI0_ID)
00078     #define INT_TC0         (INT_PERIPH_BASE + TC0_ID)
00079     #define INT_TC1         (INT_PERIPH_BASE + TC1_ID)
00080     #define INT_TC2         (INT_PERIPH_BASE + TC2_ID)
00081     #define INT_TC3         (INT_PERIPH_BASE + TC3_ID)
00082     #define INT_TC4         (INT_PERIPH_BASE + TC4_ID)
00083     #define INT_TC5         (INT_PERIPH_BASE + TC5_ID)
00084     #define INT_ADC         (INT_PERIPH_BASE + ADC_ID)
00085     #define INT_DACC        (INT_PERIPH_BASE + DACC_ID)
00086     #define INT_PWM         (INT_PERIPH_BASE + PWM_ID)
00087 
00088     // Total number of interrupts.
00089     #define NUM_INTERRUPTS  48
00090 
00091 #elif CPU_CM3_SAM3X
00092     #define INT_SUPC        (INT_PERIPH_BASE + SUPC_ID)
00093     #define INT_RSTC        (INT_PERIPH_BASE + RSTC_ID)
00094     #define INT_RTC         (INT_PERIPH_BASE + RTC_ID)
00095     #define INT_RTT         (INT_PERIPH_BASE + RTT_ID)
00096     #define INT_WDT         (INT_PERIPH_BASE + WDT_ID)
00097     #define INT_PMC         (INT_PERIPH_BASE + PMC_ID)
00098     #define INT_EEFC0       (INT_PERIPH_BASE + EEFC0_ID)
00099     #define INT_EEFC1       (INT_PERIPH_BASE + EEFC1_ID)
00100     #define INT_UART0       (INT_PERIPH_BASE + UART0_ID)
00101     #define INT_SMC_SDRAMC  (INT_PERIPH_BASE + SMC_SDRAMC_ID)
00102     #define INT_SDRAMC      (INT_PERIPH_BASE + SDRAMC_ID)
00103     #define INT_PIOA        (INT_PERIPH_BASE + PIOA_ID)
00104     #define INT_PIOB        (INT_PERIPH_BASE + PIOB_ID)
00105     #define INT_PIOC        (INT_PERIPH_BASE + PIOC_ID)
00106     #define INT_PIOD        (INT_PERIPH_BASE + PIOD_ID)
00107     #define INT_PIOE        (INT_PERIPH_BASE + PIOE_ID)
00108     #define INT_PIOF        (INT_PERIPH_BASE + PIOF_ID)
00109     #define INT_US0         (INT_PERIPH_BASE + US0_ID)
00110     #define INT_US1         (INT_PERIPH_BASE + US1_ID)
00111     #define INT_US2         (INT_PERIPH_BASE + US2_ID)
00112     #define INT_US3         (INT_PERIPH_BASE + US3_ID)
00113     #define INT_HSMCI       (INT_PERIPH_BASE + HSMCI_ID)
00114     #define INT_TWI0        (INT_PERIPH_BASE + TWI0_ID)
00115     #define INT_TWI1        (INT_PERIPH_BASE + TWI1_ID)
00116     #define INT_SPI0        (INT_PERIPH_BASE + SPI0_ID)
00117     #define INT_SPI1        (INT_PERIPH_BASE + SPI1_ID)
00118     #define INT_SSC         (INT_PERIPH_BASE + SSC_ID)
00119     #define INT_TC0         (INT_PERIPH_BASE + TC0_ID)
00120     #define INT_TC1         (INT_PERIPH_BASE + TC1_ID)
00121     #define INT_TC2         (INT_PERIPH_BASE + TC2_ID)
00122     #define INT_TC3         (INT_PERIPH_BASE + TC3_ID)
00123     #define INT_TC4         (INT_PERIPH_BASE + TC4_ID)
00124     #define INT_TC5         (INT_PERIPH_BASE + TC5_ID)
00125     #define INT_TC6         (INT_PERIPH_BASE + TC6_ID)
00126     #define INT_TC7         (INT_PERIPH_BASE + TC7_ID)
00127     #define INT_TC8         (INT_PERIPH_BASE + TC8_ID)
00128     #define INT_PWM         (INT_PERIPH_BASE + PWM_ID)
00129     #define INT_ADC         (INT_PERIPH_BASE + ADC_ID)
00130     #define INT_DACC        (INT_PERIPH_BASE + DACC_ID)
00131     #define INT_DMAC        (INT_PERIPH_BASE + DMAC_ID)
00132     #define INT_UOTGHS      (INT_PERIPH_BASE + UOTGHS_ID)
00133     #define INT_TRNG        (INT_PERIPH_BASE + TRNG_ID)
00134     #define INT_EMAC        (INT_PERIPH_BASE + EMAC_ID)
00135     #define INT_CAN0        (INT_PERIPH_BASE + CAN0_ID)
00136     #define INT_CAN1        (INT_PERIPH_BASE + CAN1_ID)
00137 
00138     // Total number of interrupts.
00139     #define NUM_INTERRUPTS  61
00140 
00141 #else
00142     #error Peripheral IDs undefined
00143 #endif
00144 /*\}*/
00145 
00146 #endif /* SAM3_INTS_H */