sam3_pio.h

Go to the documentation of this file.
00001 
00040 /*
00041  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071 
00072 #ifndef SAM3_PIO_H
00073 #define SAM3_PIO_H
00074 
00078 /*\{*/
00079 #define PIOA_BASE  0x400E0E00
00080 #define PIOB_BASE  0x400E1000
00081 #define PIOC_BASE  0x400E1200
00082 
00083 #if CPU_CM3_SAM3X
00084     #define PIOD_BASE  0x400E1400
00085     #define PIOE_BASE  0x400E1600
00086     #define PIOF_BASE  0x400E1800
00087 #endif
00088 /*\}*/
00089 
00091 /*\{*/
00092 #define PIO_PER_OFF     0x00000000  ///< PIO enable register offset.
00093 #define PIO_PDR_OFF     0x00000004  ///< PIO disable register offset.
00094 #define PIO_PSR_OFF     0x00000008  ///< PIO status register offset.
00095 #define PIO_OER_OFF     0x00000010  ///< Output enable register offset.
00096 #define PIO_ODR_OFF     0x00000014  ///< Output disable register offset.
00097 #define PIO_OSR_OFF     0x00000018  ///< Output status register offset.
00098 #define PIO_IFER_OFF    0x00000020  ///< Input filter enable register offset.
00099 #define PIO_IFDR_OFF    0x00000024  ///< Input filter disable register offset.
00100 #define PIO_IFSR_OFF    0x00000028  ///< Input filter status register offset.
00101 #define PIO_SODR_OFF    0x00000030  ///< Set output data register offset.
00102 #define PIO_CODR_OFF    0x00000034  ///< Clear output data register offset.
00103 #define PIO_ODSR_OFF    0x00000038  ///< Output data status register offset.
00104 #define PIO_PDSR_OFF    0x0000003C  ///< Pin data status register offset.
00105 #define PIO_IER_OFF     0x00000040  ///< Interrupt enable register offset.
00106 #define PIO_IDR_OFF     0x00000044  ///< Interrupt disable register offset.
00107 #define PIO_IMR_OFF     0x00000048  ///< Interrupt mask register offset.
00108 #define PIO_ISR_OFF     0x0000004C  ///< Interrupt status register offset.
00109 #define PIO_MDER_OFF    0x00000050  ///< Multi-driver enable register offset.
00110 #define PIO_MDDR_OFF    0x00000054  ///< Multi-driver disable register offset.
00111 #define PIO_MDSR_OFF    0x00000058  ///< Multi-driver status register offset.
00112 #define PIO_PUDR_OFF    0x00000060  ///< Pull-up disable register offset.
00113 #define PIO_PUER_OFF    0x00000064  ///< Pull-up enable register offset.
00114 #define PIO_PUSR_OFF    0x00000068  ///< Pull-up status register offset.
00115 #if CPU_CM3_SAM3X || CPU_CM3_SAM3U
00116     #define PIO_ABSR_OFF     0x00000070  ///< PIO peripheral select register offset.
00117 #elif CPU_CM3_SAM3N || CPU_CM3_SAM3S
00118     #define PIO_ABCDSR1_OFF  0x00000070  ///< PIO peripheral select register 1 offset.
00119     #define PIO_ABCDSR2_OFF  0x00000074  ///< PIO peripheral select register 2 offset.
00120 #else
00121     #error Undefined PIO peripheral select register for selected cpu
00122 #endif
00123 #define PIO_OWER_OFF    0x000000A0  ///< PIO output write enable register offset.
00124 #define PIO_OWDR_OFF    0x000000A4  ///< PIO output write disable register offset.
00125 #define PIO_OWSR_OFF    0x000000A8  ///< PIO output write status register offset.
00126 /*\}*/
00127 
00128 
00129 #if defined(PIOA_BASE)
00130 
00131     /*\{*/
00132     #define PIOA_ACCESS(offset) (*((reg32_t *)(PIOA_BASE + (offset))))
00133 
00134     #define PIOA_PER      PIOA_ACCESS(PIO_PER_OFF)       ///< PIO enable register address.
00135     #define PIOA_PDR      PIOA_ACCESS(PIO_PDR_OFF)       ///< PIO disable register address.
00136     #define PIOA_PSR      PIOA_ACCESS(PIO_PSR_OFF)       ///< PIO status register address.
00137     #define PIOA_OER      PIOA_ACCESS(PIO_OER_OFF)       ///< Output enable register address.
00138     #define PIOA_ODR      PIOA_ACCESS(PIO_ODR_OFF)       ///< Output disable register address.
00139     #define PIOA_OSR      PIOA_ACCESS(PIO_OSR_OFF)       ///< Output status register address.
00140     #define PIOA_IFER     PIOA_ACCESS(PIO_IFER_OFF)      ///< Input filter enable register address.
00141     #define PIOA_IFDR     PIOA_ACCESS(PIO_IFDR_OFF)      ///< Input filter disable register address.
00142     #define PIOA_IFSR     PIOA_ACCESS(PIO_IFSR_OFF)      ///< Input filter status register address.
00143     #define PIOA_SODR     PIOA_ACCESS(PIO_SODR_OFF)      ///< Set output data register address.
00144     #define PIOA_CODR     PIOA_ACCESS(PIO_CODR_OFF)      ///< Clear output data register address.
00145     #define PIOA_ODSR     PIOA_ACCESS(PIO_ODSR_OFF)      ///< Output data status register address.
00146     #define PIOA_PDSR     PIOA_ACCESS(PIO_PDSR_OFF)      ///< Pin data status register address.
00147     #define PIOA_IER      PIOA_ACCESS(PIO_IER_OFF)       ///< Interrupt enable register address.
00148     #define PIOA_IDR      PIOA_ACCESS(PIO_IDR_OFF)       ///< Interrupt disable register address.
00149     #define PIOA_IMR      PIOA_ACCESS(PIO_IMR_OFF)       ///< Interrupt mask register address.
00150     #define PIOA_ISR      PIOA_ACCESS(PIO_ISR_OFF)       ///< Interrupt status register address.
00151     #define PIOA_MDER     PIOA_ACCESS(PIO_MDER_OFF)      ///< Multi-driver enable register address.
00152     #define PIOA_MDDR     PIOA_ACCESS(PIO_MDDR_OFF)      ///< Multi-driver disable register address.
00153     #define PIOA_MDSR     PIOA_ACCESS(PIO_MDSR_OFF)      ///< Multi-driver status register address.
00154     #define PIOA_PUDR     PIOA_ACCESS(PIO_PUDR_OFF)      ///< Pull-up disable register address.
00155     #define PIOA_PUER     PIOA_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
00156     #define PIOA_PUSR     PIOA_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
00157 #ifdef PIO_ABSR_OFF
00158     #define PIOA_ABSR     PIOA_ACCESS(PIO_ABSR_OFF)      ///< PIO peripheral select register address.
00159 #else
00160     #define PIOA_ABCDSR1  PIOA_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
00161     #define PIOA_ABCDSR2  PIOA_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
00162 #endif
00163     #define PIOA_OWER     PIOA_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
00164     #define PIOA_OWDR     PIOA_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
00165     #define PIOA_OWSR     PIOA_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
00166     /*\}*/
00167 #endif /* PIOA_BASE */
00168 
00169 #if defined(PIOB_BASE)
00170 
00171     /*\{*/
00172     #define PIOB_ACCESS(offset) (*((reg32_t *)(PIOB_BASE + (offset))))
00173 
00174     #define PIOB_PER      PIOB_ACCESS(PIO_PER_OFF)       ///< PIO enable register address.
00175     #define PIOB_PDR      PIOB_ACCESS(PIO_PDR_OFF)       ///< PIO disable register address.
00176     #define PIOB_PSR      PIOB_ACCESS(PIO_PSR_OFF)       ///< PIO status register address.
00177     #define PIOB_OER      PIOB_ACCESS(PIO_OER_OFF)       ///< Output enable register address.
00178     #define PIOB_ODR      PIOB_ACCESS(PIO_ODR_OFF)       ///< Output disable register address.
00179     #define PIOB_OSR      PIOB_ACCESS(PIO_OSR_OFF)       ///< Output status register address.
00180     #define PIOB_IFER     PIOB_ACCESS(PIO_IFER_OFF)      ///< Input filter enable register address.
00181     #define PIOB_IFDR     PIOB_ACCESS(PIO_IFDR_OFF)      ///< Input filter disable register address.
00182     #define PIOB_IFSR     PIOB_ACCESS(PIO_IFSR_OFF)      ///< Input filter status register address.
00183     #define PIOB_SODR     PIOB_ACCESS(PIO_SODR_OFF)      ///< Set output data register address.
00184     #define PIOB_CODR     PIOB_ACCESS(PIO_CODR_OFF)      ///< Clear output data register address.
00185     #define PIOB_ODSR     PIOB_ACCESS(PIO_ODSR_OFF)      ///< Output data status register address.
00186     #define PIOB_PDSR     PIOB_ACCESS(PIO_PDSR_OFF)      ///< Pin data status register address.
00187     #define PIOB_IER      PIOB_ACCESS(PIO_IER_OFF)       ///< Interrupt enable register address.
00188     #define PIOB_IDR      PIOB_ACCESS(PIO_IDR_OFF)       ///< Interrupt disable register address.
00189     #define PIOB_IMR      PIOB_ACCESS(PIO_IMR_OFF)       ///< Interrupt mask register address.
00190     #define PIOB_ISR      PIOB_ACCESS(PIO_ISR_OFF)       ///< Interrupt status register address.
00191     #define PIOB_MDER     PIOB_ACCESS(PIO_MDER_OFF)      ///< Multi-driver enable register address.
00192     #define PIOB_MDDR     PIOB_ACCESS(PIO_MDDR_OFF)      ///< Multi-driver disable register address.
00193     #define PIOB_MDSR     PIOB_ACCESS(PIO_MDSR_OFF)      ///< Multi-driver status register address.
00194     #define PIOB_PUDR     PIOB_ACCESS(PIO_PUDR_OFF)      ///< Pull-up disable register address.
00195     #define PIOB_PUER     PIOB_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
00196     #define PIOB_PUSR     PIOB_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
00197 #ifdef PIO_ABSR_OFF
00198     #define PIOB_ABSR     PIOB_ACCESS(PIO_ABSR_OFF)      ///< PIO peripheral select register address.
00199 #else
00200     #define PIOB_ABCDSR1  PIOB_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
00201     #define PIOB_ABCDSR2  PIOB_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
00202 #endif
00203     #define PIOB_OWER     PIOB_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
00204     #define PIOB_OWDR     PIOB_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
00205     #define PIOB_OWSR     PIOB_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
00206     /*\}*/
00207 #endif /* PIOB_BASE */
00208 
00209 #if defined(PIOC_BASE)
00210 
00211     /*\{*/
00212     #define PIOC_ACCESS(offset) (*((reg32_t *)(PIOC_BASE + (offset))))
00213 
00214     #define PIOC_PER      PIOC_ACCESS(PIO_PER_OFF)       ///< PIO enable register address.
00215     #define PIOC_PDR      PIOC_ACCESS(PIO_PDR_OFF)       ///< PIO disable register address.
00216     #define PIOC_PSR      PIOC_ACCESS(PIO_PSR_OFF)       ///< PIO status register address.
00217     #define PIOC_OER      PIOC_ACCESS(PIO_OER_OFF)       ///< Output enable register address.
00218     #define PIOC_ODR      PIOC_ACCESS(PIO_ODR_OFF)       ///< Output disable register address.
00219     #define PIOC_OSR      PIOC_ACCESS(PIO_OSR_OFF)       ///< Output status register address.
00220     #define PIOC_IFER     PIOC_ACCESS(PIO_IFER_OFF)      ///< Input filter enable register address.
00221     #define PIOC_IFDR     PIOC_ACCESS(PIO_IFDR_OFF)      ///< Input filter disable register address.
00222     #define PIOC_IFSR     PIOC_ACCESS(PIO_IFSR_OFF)      ///< Input filter status register address.
00223     #define PIOC_SODR     PIOC_ACCESS(PIO_SODR_OFF)      ///< Set output data register address.
00224     #define PIOC_CODR     PIOC_ACCESS(PIO_CODR_OFF)      ///< Clear output data register address.
00225     #define PIOC_ODSR     PIOC_ACCESS(PIO_ODSR_OFF)      ///< Output data status register address.
00226     #define PIOC_PDSR     PIOC_ACCESS(PIO_PDSR_OFF)      ///< Pin data status register address.
00227     #define PIOC_IER      PIOC_ACCESS(PIO_IER_OFF)       ///< Interrupt enable register address.
00228     #define PIOC_IDR      PIOC_ACCESS(PIO_IDR_OFF)       ///< Interrupt disable register address.
00229     #define PIOC_IMR      PIOC_ACCESS(PIO_IMR_OFF)       ///< Interrupt mask register address.
00230     #define PIOC_ISR      PIOC_ACCESS(PIO_ISR_OFF)       ///< Interrupt status register address.
00231     #define PIOC_MDER     PIOC_ACCESS(PIO_MDER_OFF)      ///< Multi-driver enable register address.
00232     #define PIOC_MDDR     PIOC_ACCESS(PIO_MDDR_OFF)      ///< Multi-driver disable register address.
00233     #define PIOC_MDSR     PIOC_ACCESS(PIO_MDSR_OFF)      ///< Multi-driver status register address.
00234     #define PIOC_PUDR     PIOC_ACCESS(PIO_PUDR_OFF)      ///< Pull-up disable register address.
00235     #define PIOC_PUER     PIOC_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
00236     #define PIOC_PUSR     PIOC_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
00237 #ifdef PIO_ABSR_OFF
00238     #define PIOC_ABSR     PIOC_ACCESS(PIO_ABSR_OFF)      ///< PIO peripheral select register address.
00239 #else
00240     #define PIOC_ABCDSR1  PIOC_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
00241     #define PIOC_ABCDSR2  PIOC_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
00242 #endif
00243     #define PIOC_OWER     PIOC_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
00244     #define PIOC_OWDR     PIOC_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
00245     #define PIOC_OWSR     PIOC_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
00246     /*\}*/
00247 #endif /* PIOC_BASE */
00248 
00249 #if defined(PIOD_BASE)
00250 
00251     /*\{*/
00252     #define PIOD_ACCESS(offset) (*((reg32_t *)(PIOD_BASE + (offset))))
00253 
00254     #define PIOD_PER      PIOD_ACCESS(PIO_PER_OFF)       ///< PIO enable register address.
00255     #define PIOD_PDR      PIOD_ACCESS(PIO_PDR_OFF)       ///< PIO disable register address.
00256     #define PIOD_PSR      PIOD_ACCESS(PIO_PSR_OFF)       ///< PIO status register address.
00257     #define PIOD_OER      PIOD_ACCESS(PIO_OER_OFF)       ///< Output enable register address.
00258     #define PIOD_ODR      PIOD_ACCESS(PIO_ODR_OFF)       ///< Output disable register address.
00259     #define PIOD_OSR      PIOD_ACCESS(PIO_OSR_OFF)       ///< Output status register address.
00260     #define PIOD_IFER     PIOD_ACCESS(PIO_IFER_OFF)      ///< Input filter enable register address.
00261     #define PIOD_IFDR     PIOD_ACCESS(PIO_IFDR_OFF)      ///< Input filter disable register address.
00262     #define PIOD_IFSR     PIOD_ACCESS(PIO_IFSR_OFF)      ///< Input filter status register address.
00263     #define PIOD_SODR     PIOD_ACCESS(PIO_SODR_OFF)      ///< Set output data register address.
00264     #define PIOD_CODR     PIOD_ACCESS(PIO_CODR_OFF)      ///< Clear output data register address.
00265     #define PIOD_ODSR     PIOD_ACCESS(PIO_ODSR_OFF)      ///< Output data status register address.
00266     #define PIOD_PDSR     PIOD_ACCESS(PIO_PDSR_OFF)      ///< Pin data status register address.
00267     #define PIOD_IER      PIOD_ACCESS(PIO_IER_OFF)       ///< Interrupt enable register address.
00268     #define PIOD_IDR      PIOD_ACCESS(PIO_IDR_OFF)       ///< Interrupt disable register address.
00269     #define PIOD_IMR      PIOD_ACCESS(PIO_IMR_OFF)       ///< Interrupt mask register address.
00270     #define PIOD_ISR      PIOD_ACCESS(PIO_ISR_OFF)       ///< Interrupt status register address.
00271     #define PIOD_MDER     PIOD_ACCESS(PIO_MDER_OFF)      ///< Multi-driver enable register address.
00272     #define PIOD_MDDR     PIOD_ACCESS(PIO_MDDR_OFF)      ///< Multi-driver disable register address.
00273     #define PIOD_MDSR     PIOD_ACCESS(PIO_MDSR_OFF)      ///< Multi-driver status register address.
00274     #define PIOD_PUDR     PIOD_ACCESS(PIO_PUDR_OFF)      ///< Pull-up disable register address.
00275     #define PIOD_PUER     PIOD_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
00276     #define PIOD_PUSR     PIOD_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
00277 #ifdef PIO_ABSR_OFF
00278     #define PIOD_ABSR     PIOD_ACCESS(PIO_ABSR_OFF)      ///< PIO peripheral select register address.
00279 #else
00280     #define PIOD_ABCDSR1  PIOD_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
00281     #define PIOD_ABCDSR2  PIOD_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
00282 #endif
00283     #define PIOD_OWER     PIOD_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
00284     #define PIOD_OWDR     PIOD_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
00285     #define PIOD_OWSR     PIOD_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
00286     /*\}*/
00287 #endif /* PIOD_BASE */
00288 
00289 #if defined(PIOE_BASE)
00290 
00291     /*\{*/
00292     #define PIOE_ACCESS(offset) (*((reg32_t *)(PIOE_BASE + (offset))))
00293 
00294     #define PIOE_PER      PIOE_ACCESS(PIO_PER_OFF)       ///< PIO enable register address.
00295     #define PIOE_PDR      PIOE_ACCESS(PIO_PDR_OFF)       ///< PIO disable register address.
00296     #define PIOE_PSR      PIOE_ACCESS(PIO_PSR_OFF)       ///< PIO status register address.
00297     #define PIOE_OER      PIOE_ACCESS(PIO_OER_OFF)       ///< Output enable register address.
00298     #define PIOE_ODR      PIOE_ACCESS(PIO_ODR_OFF)       ///< Output disable register address.
00299     #define PIOE_OSR      PIOE_ACCESS(PIO_OSR_OFF)       ///< Output status register address.
00300     #define PIOE_IFER     PIOE_ACCESS(PIO_IFER_OFF)      ///< Input filter enable register address.
00301     #define PIOE_IFDR     PIOE_ACCESS(PIO_IFDR_OFF)      ///< Input filter disable register address.
00302     #define PIOE_IFSR     PIOE_ACCESS(PIO_IFSR_OFF)      ///< Input filter status register address.
00303     #define PIOE_SODR     PIOE_ACCESS(PIO_SODR_OFF)      ///< Set output data register address.
00304     #define PIOE_CODR     PIOE_ACCESS(PIO_CODR_OFF)      ///< Clear output data register address.
00305     #define PIOE_ODSR     PIOE_ACCESS(PIO_ODSR_OFF)      ///< Output data status register address.
00306     #define PIOE_PDSR     PIOE_ACCESS(PIO_PDSR_OFF)      ///< Pin data status register address.
00307     #define PIOE_IER      PIOE_ACCESS(PIO_IER_OFF)       ///< Interrupt enable register address.
00308     #define PIOE_IDR      PIOE_ACCESS(PIO_IDR_OFF)       ///< Interrupt disable register address.
00309     #define PIOE_IMR      PIOE_ACCESS(PIO_IMR_OFF)       ///< Interrupt mask register address.
00310     #define PIOE_ISR      PIOE_ACCESS(PIO_ISR_OFF)       ///< Interrupt status register address.
00311     #define PIOE_MDER     PIOE_ACCESS(PIO_MDER_OFF)      ///< Multi-driver enable register address.
00312     #define PIOE_MDDR     PIOE_ACCESS(PIO_MDDR_OFF)      ///< Multi-driver disable register address.
00313     #define PIOE_MDSR     PIOE_ACCESS(PIO_MDSR_OFF)      ///< Multi-driver status register address.
00314     #define PIOE_PUDR     PIOE_ACCESS(PIO_PUDR_OFF)      ///< Pull-up disable register address.
00315     #define PIOE_PUER     PIOE_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
00316     #define PIOE_PUSR     PIOE_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
00317 #ifdef PIO_ABSR_OFF
00318     #define PIOE_ABSR     PIOE_ACCESS(PIO_ABSR_OFF)      ///< PIO peripheral select register address.
00319 #else
00320     #define PIOE_ABCDSR1  PIOE_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
00321     #define PIOE_ABCDSR2  PIOE_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
00322 #endif
00323     #define PIOE_OWER     PIOE_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
00324     #define PIOE_OWDR     PIOE_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
00325     #define PIOE_OWSR     PIOE_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
00326     /*\}*/
00327 #endif /* PIOE_BASE */
00328 
00329 #if defined(PIOF_BASE)
00330 
00331     /*\{*/
00332     #define PIOF_ACCESS(offset) (*((reg32_t *)(PIOF_BASE + (offset))))
00333 
00334     #define PIOF_PER      PIOF_ACCESS(PIO_PER_OFF)       ///< PIO enable register address.
00335     #define PIOF_PDR      PIOF_ACCESS(PIO_PDR_OFF)       ///< PIO disable register address.
00336     #define PIOF_PSR      PIOF_ACCESS(PIO_PSR_OFF)       ///< PIO status register address.
00337     #define PIOF_OER      PIOF_ACCESS(PIO_OER_OFF)       ///< Output enable register address.
00338     #define PIOF_ODR      PIOF_ACCESS(PIO_ODR_OFF)       ///< Output disable register address.
00339     #define PIOF_OSR      PIOF_ACCESS(PIO_OSR_OFF)       ///< Output status register address.
00340     #define PIOF_IFER     PIOF_ACCESS(PIO_IFER_OFF)      ///< Input filter enable register address.
00341     #define PIOF_IFDR     PIOF_ACCESS(PIO_IFDR_OFF)      ///< Input filter disable register address.
00342     #define PIOF_IFSR     PIOF_ACCESS(PIO_IFSR_OFF)      ///< Input filter status register address.
00343     #define PIOF_SODR     PIOF_ACCESS(PIO_SODR_OFF)      ///< Set output data register address.
00344     #define PIOF_CODR     PIOF_ACCESS(PIO_CODR_OFF)      ///< Clear output data register address.
00345     #define PIOF_ODSR     PIOF_ACCESS(PIO_ODSR_OFF)      ///< Output data status register address.
00346     #define PIOF_PDSR     PIOF_ACCESS(PIO_PDSR_OFF)      ///< Pin data status register address.
00347     #define PIOF_IER      PIOF_ACCESS(PIO_IER_OFF)       ///< Interrupt enable register address.
00348     #define PIOF_IDR      PIOF_ACCESS(PIO_IDR_OFF)       ///< Interrupt disable register address.
00349     #define PIOF_IMR      PIOF_ACCESS(PIO_IMR_OFF)       ///< Interrupt mask register address.
00350     #define PIOF_ISR      PIOF_ACCESS(PIO_ISR_OFF)       ///< Interrupt status register address.
00351     #define PIOF_MDER     PIOF_ACCESS(PIO_MDER_OFF)      ///< Multi-driver enable register address.
00352     #define PIOF_MDDR     PIOF_ACCESS(PIO_MDDR_OFF)      ///< Multi-driver disable register address.
00353     #define PIOF_MDSR     PIOF_ACCESS(PIO_MDSR_OFF)      ///< Multi-driver status register address.
00354     #define PIOF_PUDR     PIOF_ACCESS(PIO_PUDR_OFF)      ///< Pull-up disable register address.
00355     #define PIOF_PUER     PIOF_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
00356     #define PIOF_PUSR     PIOF_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
00357 #ifdef PIO_ABSR_OFF
00358     #define PIOF_ABSR     PIOF_ACCESS(PIO_ABSR_OFF)      ///< PIO peripheral select register address.
00359 #else
00360     #define PIOF_ABCDSR1  PIOF_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
00361     #define PIOF_ABCDSR2  PIOF_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
00362 #endif
00363     #define PIOF_OWER     PIOF_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
00364     #define PIOF_OWDR     PIOF_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
00365     #define PIOF_OWSR     PIOF_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
00366     /*\}*/
00367 #endif /* PIOF_BASE */
00368 
00369 
00370 #define PIO_PERIPH_A  0
00371 #define PIO_PERIPH_B  1
00372 #ifdef PIO_ABCDSR1_OFF
00373     #define PIO_PERIPH_C  2
00374     #define PIO_PERIPH_D  3
00375 #endif
00376 
00384 #ifdef PIO_ABCDSR1_OFF
00385     #define PIO_PERIPH_SEL(base, mask, function) do { \
00386         HWREG((base) + PIO_ABCDSR1_OFF) &= ~(mask); \
00387         HWREG((base) + PIO_ABCDSR2_OFF) &= ~(mask); \
00388         if ((function) & 1) \
00389             HWREG((base) + PIO_ABCDSR1_OFF) |= (mask); \
00390         if ((function) & 2) \
00391             HWREG((base) + PIO_ABCDSR2_OFF) |= (mask); \
00392     } while (0)
00393 #else
00394     #define PIO_PERIPH_SEL(base, mask, function) do { \
00395         HWREG((base) + PIO_ABSR_OFF) &= ~(mask); \
00396         if ((function) & 1) \
00397             HWREG((base) + PIO_ABSR_OFF) |= (mask); \
00398     } while (0)
00399 #endif
00400 
00401 
00402 #endif /* SAM3_PIO_H */
sam3_pio.h

Trac Sviluppatori

Abbonati alla Newsletter

Forum di supporto
