ser_sam3.c File Reference
ARM UART and SPI I/O driver. More...
#include "hw/hw_ser.h"#include <hw/hw_cpufreq.h>#include "cfg/cfg_ser.h"#include <cfg/debug.h>#include <io/cm3.h>#include <drv/irq_cm3.h>#include <cpu/attr.h>#include <drv/ser.h>#include <drv/ser_p.h>#include <struct/fifobuf.h>Go to the source code of this file.
Data Structures | |
| struct | ArmSerial |
| Internal hardware state structure. More... | |
Defines | |
| #define | SERIRQ_PRIORITY 4 |
| default priority for serial irqs. | |
Overridable serial bus hooks | |
| #define | SER_UART0_BUS_TXINIT |
| Default TXINIT macro - invoked in uart0_init(). | |
| #define | SER_UART0_BUS_TXBEGIN |
| Invoked before starting a transmission. | |
| #define | SER_UART0_BUS_TXCHAR(c) |
| Invoked to send one character. | |
| #define | SER_UART0_BUS_TXEND |
| Invoked as soon as the txfifo becomes empty. | |
Overridable SPI hooks | |
| #define | SER_SPI0_BUS_TXINIT |
| Default TXINIT macro - invoked in spi_init() The default is no action. | |
| #define | SER_SPI0_BUS_TXCLOSE |
| Invoked after the last character has been transmitted. | |
Functions | |
| void | uart0_irq_tx (void) |
| Serial 0 TX interrupt handler. | |
| void | uart0_irq_rx (void) |
| Serial 0 RX complete interrupt handler. | |
| static | DECLARE_ISR (uart0_irq_dispatcher) |
| Serial IRQ dispatcher for USART0. | |
| static | DECLARE_ISR (spi0_irq_handler) |
| SPI0 interrupt handler. | |
Detailed Description
ARM UART and SPI I/O driver.
Definition in file ser_sam3.c.
Define Documentation
| #define SER_SPI0_BUS_TXCLOSE |
| #define SER_UART0_BUS_TXINIT |
Value:
do { \ PIOA_PDR = BV(RXD0) | BV(TXD0); \ PIO_PERIPH_SEL(PIOA_BASE, BV(RXD0) | BV(TXD0), USART0_PERIPH); \ } while (0)
Default TXINIT macro - invoked in uart0_init().
- Disable GPIO on USART0 tx/rx pins
Definition at line 92 of file ser_sam3.c.
